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74VCXH16244
LOW VOLTAGE CMOS 16-BIT BUFFER (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS
PRELIMINARY DATA
s s
s
s
s
s
s s s
3.6V TOLERANT INPUTS AND OUTPUTS HIGH SPEED: tPD = 2.5 ns (MAX.) at VCC = 3.0 to 3.6V tPD = 3.0 ns (MAX.) at VCC = 2.3 to 2.7V POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) at VCC = 3.0V |IOH| = IOL = 18 mA (MIN) at VCC = 2.3V OPERATING VOLTAGE RANGE: VCC (OPR) = 1.8V to 3.6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 16244 BUS HOLD PROVIDED ON DATA INPUTS LATCH-UP PERFORMANCE EXCEEDS 300mA ESD PERFORMANCE: HBM >2000V; MM > 200V
T (TSSOP48 Package) ORDER CODES : 74VCXH16244T
PIN CONNECTION
DESCRIPTION The 74VCXH16244 is a low voltage CMOS 16-BIT BUS BUFFER (NON-INVERTED) fabricated with sub-micron silicon gate and five layer metal wiring C2MOS technology. It is ideal for low power and very high speed 2.3 to 3.6V applications; it can be interfaced to 3.6V signal enviroment for both inputs and outputs. Any nG control output governs four BUS BUFFERS. Output Enable input (nG) tied together gives full 16-bit operation. When nG is LOW, the outputs are on. When nG is HIGH, the output are in high impedance state. This device is designed to be used with 3 state memory address drivers, etc. Bus hold on data inputs is provided in order to eliminate te need for external pull-up or pull-down resistor. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
February 1999
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74VCXH16244
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No 1 2, 3, 5, 6 8, 9, 11, 12 13, 14, 16, 17 19, 20, 22, 23 24 25 30, 29, 27, 26 36, 35, 33, 32 41, 40, 38, 37 47, 46, 44, 43 48 4,10, 15, 21, 28, 34, 39, 45 7, 18, 31, 42 SYMBOL 1G 1Y1 to 1Y4 2Y1 to 2Y4 3Y1 to 3Y4 4Y1 to 4Y4 4G 3G 4A1 to 4A4 3A1 to 3A4 2A1 to 2A4 1A1 to 1A4 2G GND VCC NAME AND FUNCT ION Output Enable Input Data Outputs Data Outputs Data Outputs Data Outputs Output Enable Input Output Enable Input Data Inputs Data Inputs Data Inputs Data Inputs Output Enable Input Ground (0V) Positive Supply Voltage
IEC LOGIC SYMBOLS
TRUTH TABLE
INPUT G L L H
X:"H" or "L" Z: High impedance
OUTPUT An L H X Yn L H Z
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ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VO VO IIK IOK IO ICC orIGND PD Tstg TL Supply Voltage DC Input Voltage DC Output Voltage (OFF state) DC Output Voltage (High or Low State) (note1) DC Input Diode Current DC Output Diode Current (note2) DC Output Source/Sink Current DC VCC or Ground Current Per Supply Pin Power Dissipation Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to + 4.6 -0.5 to + 4.6 -0.5 to + 4.6 -0.5 to VCC + 0.5 - 50 50 50 100 400 -65 to +150 300 Unit V V V V mA mA mA mA mW
o o
C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. 1) IO absolute maximum rating must be observed 2) VO < GND, VO > VCC
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO VO IOH, IOL IOH, IOL Top dt/dv Supply Voltage Input Voltage Output Voltage (OFF state) Output Voltage (High or Low State) High or Low Level Output Current (VCC = 3.0 to 3.6V) High or Low Level Output Current (VCC = 2.3 to 2.7V) Operating Temperature: Input Transition Rise or Fall Rate (V CC = 3.0V) (note 1) Parameter Value 2.3 to 3.6 -0.3 to 3.6 0 to 3.6 0 to VCC 24 18 -40 to+85 0 to 10 Unit V V V V mA mA
o
C
ns/V
1) VIN from0.8V to 2.0V, VCC = 3.0V
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74VCXH16244
DC SPECIFICATIONS (2.7V < VCC 3.6V unless otherwise specified)
Symb ol Parameter V CC (V) VIH VIL VOH High Level Input Voltage Low Level Input Voltage High Level Output Voltage 2.7 to 3.6 2.7 to 3.6 2.7 3.0 3.0 VOL Low Level Output Voltage 2.7 to 3.6 2.7 3.0 3.0 II II(HOLD) Input Leakage Current Input Hold Current 2.7 to 3.6 3 3.6 IOZ Ioff ICC ICC 3 State Output Leakage Current Power Off Leakage Current Quiescent Supply Current ICC incr. per input 2.7 to 3.6 0 2.7 to 3.6 2.7 to 3.6 VI = VIH or VIL VI = VIH or VIL IO=-100 A IO=-12 mA IO=-18 mA IO=-24 mA IO=100 A IO=12 mA IO=18 mA IO=24 mA VI = VCC orGND VI = 0.8 V VI = 2 V VI = 0 to 3.6 V VI = VIH orVIL VO = 0 to 3.6V VI orVO = 0 to 3.6V VI = VCC orGND VI orVO = VCC to 3.6 V VIH = VCC -0.6V 75 -75 500 10 10 20 20 750 A A A A Test Co nditi ons Value -40 to 85 C Min. 2.0 0.8 VCC-0.2 2.2 2.4 2.2 0.2 0.4 0.4 0.55 5 A A V V Max. V V
o
Un it
DC SPECIFICATIONS (2.3V < VCC 2.7V unless otherwise specified)
Symb ol Parameter V CC (V) VIH VIL VOH High Level Input Voltage Low Level Input Voltage High Level Output Voltage 2.3 to 2.7 2.3 to 2.7 2.3 2.3 2.3 VOL Low Level Output Voltage 2.3 to 2.7 2.3 2.3 II II(HOLD) IOZ Ioff ICC Input Leakage Current Input Hold Current 3 State Output Leakage Current Power Off Leakage Current Quiescent Supply Current 2.3 to 2.7 2.3 2.3 to 2.7 0 2.3 to 2.7 VI = VIH or VIL VI = VIH or VIL IO=-100 A IO=-6 mA IO=-12 mA IO=-18 mA IO=100 A IO=12 mA IO=18 mA VI = VCC orGND VI = 0.7 V VI = 1.7 V VI = VIH orVIL VO = 0 to 3.6V VI orVO = 0 to 3.6V VI = VCC orGND VI orVO = VCC to 3.6 V 4/9 45 -45 10 10 20 20 A A A Test Co nditi ons Value -40 to 85 o C Min. 1.6 0.7 VCC-0.2 2.0 1.8 1.7 0.2 0.4 0.6 5 A A V V Max. V V Un it
74VCXH16244
DYNAMIC SWITCHING CHARACTERISTICS (Ta = 25oC, Input tr = tf = 2.0ns, CL = 30pF, RL = 500)
Symb ol Parameter V CC (V) VOLP VOLV VOHV Dynamic Low Voltage Quiet Output (note 1, 3) Dynamic Low Voltage Quiet Output (note 1, 3) Dynamic High Voltage Quiet Output (note 2, 3) 2.5 3.3 2.5 3.3 2.5 3.3 VIL = 0 V VIH = VCC VIL = 0 V VIH = VCC VIL = 0 V VIH = VCC Test Con dition s Min . Value T A = 25 C T yp. 0.6 0.8 -0.6 -0.8 1.9 2.2 Max. V V V
o
Un it
1) Number ofoutputs defined as "n". Measured with"n-1" outputs switching from HIGH to LOW or LOW t o HIGH. The remaining output is measured in the LOW state. 2) Number ofoutputs defined as "n". Measured with"n-1" outputs switching from HIGH to LOW or LOW t o HIGH. The remaining output is measured in the HIGH state. 3) Parameters guaranteed by design.
AC ELECTRICAL CHARACTERISTICS (CL = 30 pF, RL = 500 , Input tr = tf = 2.0 ns)
Symb ol Parameter V CC (V) tPLH tPHL tPZL tPZH tPLZ tPHZ tOSLH tOSHL Propagation Delay Time Output Enable Time Output Disable Time Output to Output Skew Time (note 1, 2) Test Con dition Waveform Value -40 to 85 o C Min. 1.0 0.8 1.0 0.8 1.0 0.8 Max. 3.0 2.5 4.1 3.5 3.8 3.5 0.5 0.5 Un it
2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 3.0 to 3.6
1 2 2
ns ns ns ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any twooutputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = |tPLHm - tPLHn|, tOSHL = |tPHLm - tpHLn|) 2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS
Symb ol Parameter V CC (V) CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance (note 1) 2.5 or 3.3 2.5 or 3.3 2.5 or 3.3 VIN = 0V or VCC VIN = 0V or VCC fIN = 10MHz VIN = 0V or VCC Test Co nditi ons Min. Valu e T A = 25 C T yp. 6 7 20 Max. pF pF pF
o
Un it
1) CPD isdefined as the value of the IC'sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. Average operting current can be obtained by the following equation. I CC(opr) = CPD * VCC * fIN + ICC/16 (per circuit)
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74VCXH16244
TEST CIRCUIT
T EST tPLH , tPHL tPZL , tPLZ (VCC = 3.0 to 3.6V) tPZL , tPLZ (VCC = 2.3 to 2.7V) tPZH , tPHZ
CL = 30 pF or equivalent (includes jigand probe capacitance) RL = R1 = 500 orequivalent RT = ZOUT of pulse generator (typically 50)
SW IT CH Open 6V 2VCC GND
WAVEFORM SYMBOL VALUES
Symbo l 3.0 to 3.6V VIH VM VX VY 2.7V 1.5V VOL + 0.3V VOH - 0.3V V CC 2.3 to 2.7V VCC VCC/2 VOL + 0.15V VOH - 0.15V
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WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cicle)
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cicle)
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TSSOP48 MECHANICAL DATA
mm MIN. A A1 A2 b c D E E1 e K L 0o 0.50 0.05 0.85 0.17 0.09 12.4 7.95 6.0 12.5 8.1 6.1 0.5 BSC 4o 0.60 8o 0.70 0o 0.020 0.10 0.9 TYP. MAX. 1.1 0.15 0.95 0.27 0.20 12.6 8.25 6.2 0.002 0.335 0.0067 0.0035 0.408 0.313 0.236 0.492 0.319 0.240 0.0197 BSC 4o 0.024 8o 0.028 0.004 0.354 MIN. inch TYP. MAX. 0.433 0.006 0.374 0.011 0.0079 0.496 0.325 0.244
DIM.
A
A2 A1 b e K c L E
D
E1
PIN 1 IDENTIFICATION
1
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com .
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